DIGITAL SIGNAL PROCESSOR AND DIGITAL SIGNAL PROCESSING METHOD

摘要

PROBLEM TO BE SOLVED: To reduce jitter included in such an output signal, wherein the jitter occurs in the output signal because the output signal is outputted while synchronized with a clock in a conventional digital signal processor provided with a rate converting part.

SOLUTION: An outputting part 102 is provided with a rate observing part 103 for observing an output rate of a signal processing part 112 and a timing adjusting part 106 for adjusting output timing. A read timing generating part 107 generates a read timing control signal on the basis of an observation result of the rate observing part 103 and uses the read timing control signal for read control of a storing part (FIFO) 111.

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