发明名称 PHASE INTERPOLATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce power consumption by preventing through current from flowing about a phase interpolation circuit for generating a digital signal obtained by interpolating the middle between two digital signals having different phases and subdividing phase difference between the two digital signals. SOLUTION: Element circuits 35 to 37 of a phase interpolation circuit 34 have first and second output drive circuits. The first output drive circuit is connected between input ports A, B and an output port X, becomes a pull-up circuit when the input ports A, B are at an L level, becomes a pull-down circuit when the input ports A, B are at an H level, and becomes inactive when the levels of the input ends A, B are different. The second output drive circuit is connected between the input port A and the output port B, has smaller driving force than the first output drive circuit, becomes a pull-up circuit when the input port A is at the L level and becomes a pull-down circuit when the input port A is at the H level. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004129110(A) 申请公布日期 2004.04.22
申请号 JP20020293367 申请日期 2002.10.07
申请人 FUJITSU LTD 发明人 FUKUSHI ISAO
分类号 H03K5/00;H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K5/00
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