Carrier injection protection structure

摘要

A structure protects CMOS logic from substrate minority carrier injection caused by the inductive switching of a power device. A single Integrated Circuit (IC) supports one or more power MOSFETs and one or more arrays of CMOS logic. A highly doped ring is formed between the drain of the power MOSFET and the CMOS logic array to provide a low resistance path to ground for the injected minority carriers. Under the CMOS logic is a highly doped buried layer to form a region of high recombination for the injected minority carriers. One or more CMOS devices are formed above the buried layer. The substrate is a resistive and the injected current is attenuated. The well in which the CMOS devices rest forms a low resistance ground plane for the injected minority carriers.