发明名称 |
Electrostatic discharge protection circuit |
摘要 |
The invention provides an ESD protection circuit compatible with the high voltage device manufacturing processes by using parasitic bipolar junction transistor punch characteristics. The design of the present invention takes advantage of bipolar punch characteristics of the parasitic NPN or PNP bipolar structure to bypass the ESD current, thus significantly increasing the ESD level. In addition, the ESD protection circuit of the present invention can greatly reduce the ESD cell areas by eliminating certain prior art diode structure.
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申请公布号 |
US2004075136(A1) |
申请公布日期 |
2004.04.22 |
申请号 |
US20020065455 |
申请日期 |
2002.10.18 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
CHENG JYH-NAN |
分类号 |
H01L23/60;H01L23/62;H01L27/02;H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119;(IPC1-7):H01L29/76 |
主分类号 |
H01L23/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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