发明名称 LAYOUT METHOD, LAYOUT APPARATUS, LAYOUT PROGRAM, AND RECORDING MEDIUM
摘要 <p>A layout method in a layout apparatus for layout of an integrated circuit includes a step of placing a plurality of cells at approximate positions according to the circuit data and a step of placing the plurality of cells at specific positions according to the result of the brief placement of the plurality of cells at the approximate positions. When placing the plurality of cells at specific positions, the plurality of cells are placed at specific positions, a critical area between adjacent cells is calculated, and the specific positions of the cells are modified so as to minimize the critical area obtained.</p>
申请公布号 WO2004034463(A1) 申请公布日期 2004.04.22
申请号 WO2002JP10522 申请日期 2002.10.10
申请人 SHIBUYA, TOSHIYUKI;FUJITSU LIMITED 发明人 SHIBUYA, TOSHIYUKI
分类号 G06F17/50;G06F9/45;(IPC1-7):H01L21/82 主分类号 G06F17/50
代理机构 代理人
主权项
地址