发明名称 MEMORY ACCESS DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory access device whose response characteristics to a memory access request are satisfactory by deciding the priority of the memory access request according to the frequency of the memory access request transmitted from a processor, and dynamically changing a memory access band assigned to each priority order in a multi-processor system. SOLUTION: A memory access device 20 is provided with a plurality of command queues 80 to 8m, a scheduler part 60, a memory access part 40 for executing memory access by using management information from the scheduler part, a control part 50 for requesting band change to the scheduler part by using the transmission frequency of the memory access request to one command queue, and an interface part 70. Thus, it is possible to execute memory access processing following the load fluctuation of each processor. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004126694(A) 申请公布日期 2004.04.22
申请号 JP20020286331 申请日期 2002.09.30
申请人 NEC CORP 发明人 DENPO HIROSHI
分类号 G06F15/177;G06F12/00;(IPC1-7):G06F12/00 主分类号 G06F15/177
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