发明名称 ELECTROPLATING METHOD AND APPARATUS FOR SUBSTRATE HAVING FINE VIA HOLE
摘要 PROBLEM TO BE SOLVED: To provide an electroplating method and an apparatus therefor by which a metal can be filled into a fine via hole without causing defects. SOLUTION: In electroplating for a semiconductor 1 or a compound substrate having fine wiring and Via holes, energizing is performed so as to optionally change pulse electrolysis conditions in accordance with the ratio between the opening size and depth of the hole, so that electroplating is filled into the Via hole. As for the pulse electrolysis conditions, energizing current density and the ratio of the energizing/halting time are set in accordance with the ratio between the opening size and depth of the Via hole, and the thickness or electric resistance of an electroconductive film formed on the substrate. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004124111(A) 申请公布日期 2004.04.22
申请号 JP20020285693 申请日期 2002.09.30
申请人 HITACHI KYOWA ENGINEERING CO LTD;SONY CORP;FUJITSU LTD;DENSO CORP 发明人 KADOTA HIROYUKI;YONEMURA HITOSHI;HOSHINO MASATAKA;TOMISAKA MANABU
分类号 C25D5/18;C25D7/12;H01L21/288;(IPC1-7):C25D5/18 主分类号 C25D5/18
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