发明名称 |
METHOD AND APPARATUS FOR TOKEN TRIGGERED MULTITHREADING |
摘要 |
<p>Techniques for token triggered multithreading in a multithreaded processor are disclosed. An instruction issuance sequence for a plurality of threads of the multithreaded processor is controlled by associating with each of the threads at least one register which stores a value identifying a next thread to be permitted to issue one or more instructions, and utilizing the stored value to control the instruction issuance sequence. For example, each of a plurality of hardware thread units of the multithreaded processor may include a corresponding local register updatable by that hardware thread unit, with the local register for a given one of the hardware thread units storing a value identifying the next thread to be permitted to issue one or more instructions after the given hardware thread unit has issued one or more instructions. A global register arrangement may also or alternatively be used. The processor may be configured so as to permit the instruction issuance sequence to correspond to an arbitrary alternating even-odd sequence of threads, without introducing blocking conditions leading to thread stalls.</p> |
申请公布号 |
WO2004034340(A2) |
申请公布日期 |
2004.04.22 |
申请号 |
WO2003US31905 |
申请日期 |
2003.10.09 |
申请人 |
SANDBRIDGE TECHNOLOGIES, INC. |
发明人 |
HOKENEK, ERDEM;MOUDGILL, MAYAN;GLOSSNER, JOHN, C. |
分类号 |
G06F9/00;G06F9/30;G06F9/312;G06F9/38;G06F9/54;G07F;G07F9/00;(IPC1-7):G07F/ |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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