发明名称 MEMORY CONTROL SYSTEM AND METHOD IN ETHERNET (R)-ATM CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a method for controlling the buffer memory of an ATM-Su for easily restoring an offset of a pointer even when the position of the pointer managing the buffer memory is offset due to noise or the like. SOLUTION: The control system for the buffer memory is a control system for a buffer memory in an Ethernet(R)-ATM converter. The buffer memory is a memory all the addresses of which are managed by a pointer. The control system is provided with a write address control section for controlling a write address to the buffer memory, and a read address control section for controlling a read address to the buffer memory. The head of packets is always written to the head address of the buffer memory in the case of writing packet data. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004128764(A) 申请公布日期 2004.04.22
申请号 JP20020288256 申请日期 2002.10.01
申请人 ANDO ELECTRIC CO LTD 发明人 AZUMA EIJI
分类号 H04L12/70;H04L13/08;(IPC1-7):H04L13/08;H04L12/56 主分类号 H04L12/70
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