发明名称 |
Semiconductor memory device and testing system and testing method |
摘要 |
The semiconductor memory device includes a reference potential set-up circuit (150) which sets up a predetermined potential assigned from the outside of the device as the potential of a reference signal. A reference signal generator produces the reference signal when an amplifier amplifies a data signal occurring on the bit lines. The amplified data signal is compared with the reference signal. Independent claims are also included for the following: (a) a semiconductor memory device testing system; and (b) a semiconductor memory device testing method. |
申请公布号 |
EP1408514(A3) |
申请公布日期 |
2004.04.21 |
申请号 |
EP20030028683 |
申请日期 |
2001.04.04 |
申请人 |
NEC CORPORATION |
发明人 |
KOIKE, HIROKI |
分类号 |
G01R31/28;G06F12/16;G11C11/22;G11C11/401;G11C11/56;G11C14/00;G11C29/12;G11C29/50 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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