发明名称 DEBUG mode for a data bus
摘要 A slave device includes a queue that receives commands or data from a master device for execution on a first-in, first-out basis. A status register is responsive to the queue to provide a STATUS_FULL signal when the queue is full of commands and a STATUS_EMPTY signal when the queue is empty. A configuration register provides a DEBUG signal identifying a maintenance status of the slave device. A bus control provides a QUEUE_FULL signal in response to either (1) the STATUS_FULL signal or (2) the DEBUG signal and not the STATUS_EMPTY signal to split further commands or stall the data bus.
申请公布号 US6725306(B2) 申请公布日期 2004.04.20
申请号 US20020083833 申请日期 2002.02.27
申请人 LSI LOGIC CORPORATION 发明人 STUBER RUSSELL B.;MOSS ROBERT W.;SLUITER DAVID O.
分类号 G06F3/00;G06F13/366;G06F13/38;(IPC1-7):G06F13/38 主分类号 G06F3/00
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