Over voltage protection test multiplexer and methods of operating the same

摘要

There is disclosed a test multiplexer having over voltage protection for use in integrated circuitry, along with methods of operating the same. An exemplary test multiplexer according to one embodiment of the present invention includes a plurality of MOSFET devices and over voltage protection circuitry. The plurality of MOSFET devices, including both p-type and n-type MOSFET devices, cooperate to pass an input signal to an output signal line of the test multiplexer while the test multiplexer is enabled. The over voltage protection circuitry is biased so that a difference between the input signal voltage and a bias voltage does not exceed breakdown when the test multiplexer is disabled. An important aspect hereof is that the test multiplexer is compliant to input voltages that exceed the positive supply rail, and is capable of sustaining a high or otherwise out of threshold single ended voltage at the input without latching up.