发明名称 Shared execution unit in a dual core processor
摘要 A microprocessor includes a first processor core and a second processor core. The first core includes a first processing block. The first processing block includes an execution unit suitable for executing a first type of instruction. The second core includes a second processing block. The second processing block includes an execution unit suitable for executing an instruction if the instruction is of the first type. The processor further includes a shared execution unit. The first and second processor cores are adapted to forward an instruction to the shared execution unit for execution if the instruction is of a second type. In one embodiment, the first type of instruction includes fixed point instructions, load/store instructions, and branch instructions and the second type of instruction includes floating point instructions.
申请公布号 US6725354(B1) 申请公布日期 2004.04.20
申请号 US20000594631 申请日期 2000.06.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KAHLE JAMES ALLAN;MOORE CHARLES ROBERTS
分类号 G06F9/00;G06F9/318;G06F9/38;G06F15/78;(IPC1-7):G06F9/00 主分类号 G06F9/00
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