发明名称 |
METHOD FOR MANUFACTURING GATE OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for manufacturing a gate of a semiconductor device is provided to be capable of increasing gate bias voltage and reducing gate CD(Critical Dimension). CONSTITUTION: A gate oxide layer(22) and a polysilicon layer(24) are sequentially deposited on a substrate(20). An ion implantation layer(26) is formed on the lower portion of the polysilicon layer by carrying out an ion implantation process. A heat treatment is then performed on the resultant structure. A photoresist mask(28) is formed on the polysilicon layer. The polysilicon layer and the ion implantation layer are selectively removed by carrying out a dry etching process using the photoresist mask as an etching mask. The photoresist mask is removed from the resultant structure. Preferably, the ion implantation layer has a thickness of 100 angstrom.
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申请公布号 |
KR20040032409(A) |
申请公布日期 |
2004.04.17 |
申请号 |
KR20020061532 |
申请日期 |
2002.10.09 |
申请人 |
ANAM SEMICONDUCTOR., LTD. |
发明人 |
SHIN, JUNG UK |
分类号 |
H01L21/334;(IPC1-7):H01L21/334 |
主分类号 |
H01L21/334 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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