发明名称 Fail-over of multiple memory blocks in multiple memory modules in computer system
摘要 A computer system has a memory controller for controlling accesses to multiple memory modules, each having multiple memory blocks, and a fail-over circuit for failing-over individual memory blocks from multiple memory modules. The digital information stored in an individual memory block that has experienced memory errors in excess of a permissible threshold is copied to an auxiliary memory location. The memory accesses directed to the failed-over memory block are intercepted and redirected to the auxiliary memory location. Tags are stored to identify failed-over memory modules and corresponding auxiliary memory modules, so a tag look-up for an accessed memory address can generate a hit signal when the memory access is to a failed-over memory module and cause the auxiliary memory module to respond to the memory access.
申请公布号 US2004073829(A1) 申请公布日期 2004.04.15
申请号 US20020320188 申请日期 2002.12.16
申请人 OLARIG SOMPONG P. 发明人 OLARIG SOMPONG P.
分类号 G06F11/00;G11C29/00;H02H3/05;(IPC1-7):G06F11/00 主分类号 G06F11/00
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