发明名称 DeltaSigma MODULATOR
摘要 PROBLEM TO BE SOLVED: To virtually increase the number of output levels of a quantizer for a multi-bit▵Σmodulator with respect to the hardware that is actually configured. SOLUTION: An adder 11 receives an input signal and adds a dither to the input signal. A plurality of integrators 1 to 5 sequentially receive an output of the adder 11 via a subtractor 12 and a plurality of integrator outputs are obtained. Then c0 to c4 are respectively multiplied by outputs of the integrators 1 to 5, an adder 15 summates the products, a quantizer Q quantizes an output of the adder 15 and feeds back the quantized signal to the subtractor 12. Thus, a quantized multi-bit output is obtained from the quantizer Q. Selecting a value greater than the unity for the coefficients c0 to c4 being multipliers can decrease quantized noise without changing the number of output levels (the number of bits). COPYRIGHT: (C)2004,JPO
申请公布号 JP2004120239(A) 申请公布日期 2004.04.15
申请号 JP20020279694 申请日期 2002.09.25
申请人 SANYO ELECTRIC CO LTD 发明人 TAKEDA YUKITO
分类号 H03M7/32;H03M3/04;(IPC1-7):H03M7/32 主分类号 H03M7/32
代理机构 代理人
主权项
地址