发明名称 FABRICATION METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device fabrication method which enables a reduction in internal stress yielded when forming element isolation while suppressing such a disadvantage as variation in a threshold voltage. SOLUTION: The semiconductor device fabrication method is provided with a process for introducing indium (In) into a channel region of a silicon substrate 1 and a subsequent process for forming a gate oxide film 5 on the silicon substrate 1 by implementing heat treatment at a higher temperature (about 1,000°C) than that at which a viscous flow of the silicon oxide film occurs. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004119860(A) 申请公布日期 2004.04.15
申请号 JP20020283996 申请日期 2002.09.27
申请人 SANYO ELECTRIC CO LTD 发明人 TAKEDA YASUHIRO
分类号 H01L21/76;H01L21/265;H01L21/316;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L21/76
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