发明名称 MEMORY BUS INTERFACE
摘要 PROBLEM TO BE SOLVED: To attain a simple direct communication route between a host bus such as a bus system and a target bus such as an LPC bus. SOLUTION: The memory bus interface attains communication between a host apparatus connected to the host bus and a target apparatus connected to the target bus. The interface receives an address having first width of the target apparatus from the host apparatus through the host bus. Then the interface converts the received address of the first width into one or more address components each of which has second width. Then the interface drives one or more address components to the target bus to access the target apparatus. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004118825(A) 申请公布日期 2004.04.15
申请号 JP20030282240 申请日期 2003.07.30
申请人 HEWLETT-PACKARD DEVELOPMENT CO LP 发明人 CHHEDA SACHIN
分类号 G06F13/36;G06F12/10;G06F13/40;(IPC1-7):G06F13/36 主分类号 G06F13/36
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