发明名称 Parameter generating circuit for deciding priority of master blocks and method of generating parameter
摘要 Provided are a parameter generating circuit and a method of generating a parameter which decides priority of master blocks. An arbitration parameter generating circuit includes a counter, a short term arbitration parameter storage unit, a short term reference time measurement unit, a long term arbitration parameter control unit and a long term reference time measurement unit. The counter receives a request signal generated in order for a master block to occupy a system bus and a grant signal generated in order for an arbitrator to allow the master block to occupy the system bus, up-counts when the request signal is at a first logic level, down-counts when the grant signal is at the first logic level, and is reset in response to a predetermined short term reference time signal. The short term arbitration parameter storage unit receives and stores the counted signal as the short term arbitration parameter until the counter is reset in response to the short term reference time signal. The long term arbitration parameter control unit continuously accumulates the short term arbitration parameter outputted from the short term arbitration parameter storage unit, outputs the accumulated short term arbitration parameter as a long term arbitration parameter, and is reset in response to the long term reference time signal.
申请公布号 US2004073732(A1) 申请公布日期 2004.04.15
申请号 US20030677666 申请日期 2003.10.02
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHAE KWAN-YEOB
分类号 G06F13/362;G06F13/364;H01L21/82;H01L27/02;(IPC1-7):G06F13/36 主分类号 G06F13/362
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