| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of reading out data at a high speed, by eliminating charge supplying transistors necessary for holding the "H" level of bit lines in accordance with the increase of off-leakage of transistors due to miniaturization, and accelerating the reading speed of stored data in the "L" level of the bit lines. <P>SOLUTION: High potential source lines SLH and low potential source lines SLL are wired, stored data in the "H" level of bit lines connect the sources of memory cells M(1, 1)-M(m, n) to the high potential source lines SLH and stored data in the "L" level of the bit lines connect the sources of the memory cells M(1, 1)-M(m, n) to the low potential source lines SLL. <P>COPYRIGHT: (C)2004,JPO |
