| 摘要 |
An integrated memory including memory cells in a plurality of memory cell blocks, each memory cell block being assigned at least one dedicated data line and a register circuit that can be written from outside the memory. At the start of a test operation, data is stored in the register circuits as reference data. During an access cycle, in each case in each of the memory cell blocks, a respective memory cell or a group of memory cells is selected, a respective read amplifier is activated and, in each of the register circuits, a comparison between the data read out and the reference data is carried out. As a result, the time required for the test operation of the memory is made comparatively low.
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