发明名称 Method for reducing size of semiconductor unit in packaging process
摘要 The present invention provides different schemes for reducing the size (such as thickness) of at least a semiconductor unit (such as an IC chip) which is to be packaged. It replaces, in packaging at least a semiconductor unit, conventional grinding processes by etching schemes, particularly when the thickness of the semiconductor unit approximates an expected specification. The etching process may be embodied in a way that a semiconductor unit attached to a carrier such as a substrate, or placed onto a seating apparatus such as a chip tray, and properly shielded, is etched by means of using gas such as plasma, or beams of light. The semiconductor unit packaged according to the scheme provided by the present invention can thus be immunized against the failure resulting from die crack or back-side chipping.
申请公布号 US6720270(B1) 申请公布日期 2004.04.13
申请号 US20000660753 申请日期 2000.09.13
申请人 SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 CHANG CHIN-HUANG
分类号 H01L21/302;H01L21/68;H01L23/485;(IPC1-7):H01L21/302 主分类号 H01L21/302
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