发明名称 High performance data processing system via cache victimization protocols
摘要 A cache controller for a processor in a remote node of a system bus in a multiway multiprocessor link sends out a cache deallocate address transaction (CDAT) for a given cache line when that cache line is flushed and information from memory in a home node is no longer deemed valid for that cache line of that remote node processor. A local snoop of that CDAT transaction is then performed as a background function by other processors in the same remote node. If the snoop results indicate that same information is valid in another cache, and that cache decides it better to keep it valid in that remote node, then the information remains there. If the snoop results indicate that the information is not valid among caches in that remote node, or will be flushed due to the CDAT, the system memory directory in the home node of the multiprocessor link is notified and changes state in response to this. The system has higher performance due to the cache line maintenance functions being performed in the background rather than based on mainstream demand.
申请公布号 US6721853(B2) 申请公布日期 2004.04.13
申请号 US20010895232 申请日期 2001.06.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GUTHRIE GUY LYNN;ARIMILLI RAVI KUMAR;FIELDS, JR. JAMES STEPHEN;DODSON JOHN STEVEN
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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