发明名称 Method and circuit arrangement for reading out and for storing binary memory cell signals
摘要 The invention provides a method in which a binary memory cell signal from a; least one memory cell is applied to at least one bit line pair (201t, 201b), the binary memory cell signal from the memory tell is switched through via the bit line pair (201t, 201b) to at least one sense amplifier (202), a binary output signal of the sense amplifier (202) is switched through to a local data line pair (205) as a binary intermediate signal, the binary intermediate signal on the local data line pair (205) is switched through to at least one main data line pair (208) by means of a main data line switching transistor pair (209) in a manner dependent on a row control signal fed via a row control line (210), the main data line switching transistor pair (209) being arranged in the through-plating regions formed between the memory cell arrays.
申请公布号 US6721219(B2) 申请公布日期 2004.04.13
申请号 US20020150340 申请日期 2002.05.17
申请人 INFINEON TECHNOLOGIES, AG 发明人 CHRYSOSTOMIDES ATHANASIA;KLING SABINE;PFEFFERL PETER;SAVIGNAC DOMINIQUE;SCHNEIDER HELMUT
分类号 G11C7/06;(IPC1-7):G11C7/00 主分类号 G11C7/06
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