发明名称 |
Semiconductor-on-insulator chip incorporating partially-depleted, fully-depleted, and multiple-gate devices |
摘要 |
The present disclosure provides a system and method for forming device on an insulator material. First, a semiconductor depletion material is formed with a predetermined height and width overlying a predetermined portion of the substrate to from an active region. An isolation material formed on top of the substrate surrounding the active region so as to bury a bottom portion of the active region therein, thereby exposing a top portion of the active region. A gate dielectric layer is deposited for covering the exposed the top and two sidewalls of the top portion of the active region, and at least one gate electrode is then formed on top of the gate dielectric layer and extending through two sidewalls thereof to reach the isolation material.
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申请公布号 |
US6720619(B1) |
申请公布日期 |
2004.04.13 |
申请号 |
US20020319119 |
申请日期 |
2002.12.13 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHEN HAO-YU;YEO YEE-CHIA;YANG FU-LIANG;HU CHENMING |
分类号 |
H01L21/336;H01L29/786;(IPC1-7):H01L27/148 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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