SEMICONDUCTOR PACKAGE FOR REDUCING PACKAGE SIZE AND INCREASING CAPACITY OF MEMORY

摘要

PURPOSE: A semiconductor package for reducing a package size and increasing capacity of a memory is provided to prevent a transmission delay between upper and lower levels by shortening a wiring distance therebetween. CONSTITUTION: An upper substrate(13a) has an opening. A solder ball(5) for connection between substrates is arranged on a lower side of the upper substrate. A lower substrate(13b) having an opening is arranged on a lower side of the solder ball. A solder ball(6) for external connection is connected on a lower surface of the lower substrate. The first semiconductor chip(7a) is arranged on an upper surface of the upper substrate. The second semiconductor chip(7b) is connected on a lower surface of the lower substrate. The first semiconductor chip is electrically connected to the solder ball for connection between substrates through the opening of the upper substrate. The second semiconductor chip is electrically connected to the solder ball for connection between substrates through the opening of the lower substrate. The solder ball for connection between substrates is electrically connected to the solder ball for external connection.