发明名称 METHOD FOR FABRICATING LOW-PROFILE CIRCUIT DEVICE USING TWO LAMINATED CONDUCTIVE LAYERS VIA THIRD CONDUCTIVE LAYER
摘要 PURPOSE: A method for fabricating a low-profile circuit device using two laminated conductive layers via the third conductive layer is provided to etch easily a conductive pattern layer by forming the third conductive layer as a barrier layer. CONSTITUTION: A laminated plate is prepared by laminating the first conductive layer and the second conductive layer(12) via the third conductive layer(13). A conductive pattern layer(11A) is formed by etching the first conductive layer into a desirable pattern. The third conductive layer is removed by using the conductive pattern layer as a mask. An anchor part(15) is formed by depressing the third conductive layer inside the conductive pattern layer. A semiconductor element is fixed on the conductive pattern layer. The semiconductor element is electrically connected to a predetermined part of the conductive pattern layer. The semiconductor element is covered with a sealing resin layer(22). The anchor part is filled with the sealing resin layer. The sealing resin layer and the third conductive layer are exposed on a rear surface by removing the second conductive layer.
申请公布号 KR20040030302(A) 申请公布日期 2004.04.09
申请号 KR20030064691 申请日期 2003.09.18
申请人 KANTO SANYO SEMICONDUCTORS CO., LTD.;SANYO ELECTRIC CO., LTD. 发明人 IGARASHI YUSUKE;MIZUHARA HIDEKI;SAKAMOTO NORIAKI
分类号 H01L23/12;H01L21/56;H01L21/68;H01L23/48;H01L23/50;H05K1/18;H05K3/06;H05K3/20 主分类号 H01L23/12
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