发明名称 Magnetic memory device implementing read operation tolerant to bitline clamp voltage (VREF)
摘要 A magnetic memory device includes a memory cell array block and a reference memory cell array block having a plurality of magnetic memory cells arranged, respectively, at intersections of wordlines, digit lines, and bitlines, and reference wordlines, the digit lines, and a reference bitline, a first bitline clamp circuit coupled to a bitline to which a first selected magnetic memory cell is connected and supplying a first current to the first selected magnetic memory cell through the bitline, second and third bitline clamp circuits coupled to respective upper and lower ends of the reference bitline, for supplying a second current to selected magnetic memory cells in the reference memory cell array block through the reference bitline, and a sense amplifier for sensing and amplifying currents on first and second data lines, respectively connected to the bitline and the reference bitline, to judge data of the first selected magnetic memory cell.
申请公布号 US2004066678(A1) 申请公布日期 2004.04.08
申请号 US20030660802 申请日期 2003.09.12
申请人 OH HYUNG-ROK;KIM SU-YEON;CHO WOO-YEONG 发明人 OH HYUNG-ROK;KIM SU-YEON;CHO WOO-YEONG
分类号 G11C11/15;G11C7/12;H01L43/08;(IPC1-7):G11C7/00 主分类号 G11C11/15
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