发明名称 SEMICONDUCTOR MEMORY DEVICE EQUIPPED WITH ACTIVE LOAD CIRCUIT, AND ITS RELATED METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device equipped with an active load circuit. SOLUTION: This semiconductor memory device is provided with a memory cell array including many memory cells, a bit line sense amplifier for sense-amplifying data output from the memory cell of the memory cell array to a bit line and supplying the sense-amplified data to a data line and a complementary data line, and an active load circuit including a first load element electrically connected between the data line and a first power source and a first load element electrically connected between the complementary load element and the first power source. The electric resistance of the first load element is varied in response to the voltage level of the data line, and the electric resistance of the second load element is varied in response to the voltage level of the complementary data line. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004111031(A) 申请公布日期 2004.04.08
申请号 JP20030317419 申请日期 2003.09.09
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 CHAE MOO-SUNG;KIM MYEONG-O;SEO SUNG-MIN
分类号 G11C11/409;G11C7/06;G11C7/10;(IPC1-7):G11C11/409 主分类号 G11C11/409
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