发明名称 Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions
摘要 In one aspect, the invention provides a method of forming a contact opening to a conductive line. In one preferred implementation, a contact opening is formed to a conductive line which overlies a substrate isolation area with an etch which also outwardly exposes substrate active area to accommodate source/drain doping. In another preferred implementation, desired PMOS regions over a substrate into which p-type impurity is to be provided are exposed while a contact opening is contemporaneously formed to at least one conductive line extending over substrate isolation oxide. In another preferred implementation, a contact opening to a conductive line over a substrate and an opening to a laterally spaced substrate active area are formed in a common masking step. In another preferred implementation, desired PMOS active areas over a substrate are exposed and p-type impurity to a first concentration is provided into desired exposed areas. A masking layer is formed over the substrate and subsequently patterned and etched to form openings over source/drain regions. P-type impurity is provided through the openings into the source/drain regions to a second concentration which is greater than the first concentration.
申请公布号 US2004067611(A1) 申请公布日期 2004.04.08
申请号 US20030678513 申请日期 2003.10.03
申请人 MICRON TECHNOLOGY, INC. 发明人 JUENGLING WERNER
分类号 H01L21/336;H01L21/425;H01L21/768;H01L21/8234;H01L21/8238;(IPC1-7):H01L21/336;H01L21/823 主分类号 H01L21/336
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