| 摘要 |
PROBLEM TO BE SOLVED: To shorten the test time of a ferroelectric memory and to easily discriminate the cause of erroneous data read. SOLUTION: Either an "H" level or an "L" level is made a first potential level, the other is made a second potential level, and the potential level of a signal pin in defective contact of the signal pin is made the first potential level. In a ferroelectric memory, data for testing an address bus which have a logic value in which all bits correspond to the first potential level are written previously in a region for testing the address bus which is designated when all the pins for the address bus constituting the signal pins are set at the second potential level. An address signal is set so that all pins for the address bus are set at the second potential level, and read data for testing an address bus are read through pins for a data bus constituting signal pins. When the read data for testing the address bus are equal to data for testing an address bus, it is discriminated that defective contact of pins for the address bus is not caused. COPYRIGHT: (C)2004,JPO
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