发明名称 MEMORY SYSTEM
摘要 PROBLEM TO BE SOLVED: To enable a high-speed access without being influenced by a memory cell having the worst performance even when memory cells poor in performance are included. SOLUTION: This memory system comprises a memory 2 including a plurality of memory areas R1-R4 and operated based on the same principle, and an address conversion control circuit 1 for converting a logic address to a physical address based on the correspondence between the address spaces AS1-AS4 of the memory 2 and the memory areas R1-R4. The corresponding relation is regulated based on the unique correspondence related to the performance of the memory 2. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004110857(A) 申请公布日期 2004.04.08
申请号 JP20040004866 申请日期 2004.01.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAUCHI HIROYUKI
分类号 G06F12/06;G06F12/02;G11C11/401;(IPC1-7):G06F12/06 主分类号 G06F12/06
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