Integrated lithographic layout optimization

摘要

A method and computer system is described for designing a conflict-free altPSM layout by first constructing a planar interlock graph without predefining phase shift shapes. Feature nodes of the graph represent critical elements, while connection nodes of the graph represent phase shape interactions. A pattern analysis of the interlock graph is performed to identify layout violations. Solutions for resolving layout conflicts are applied to the layout resulting in at least one conflict-free altPSM layout. Phase shapes are then applied to the conflict-free altPSM layout. Selection of an optimal solution can be made based on cost analysis.