发明名称 |
Enhanced bus arbiter utilizing variable priority and fairness |
摘要 |
A bus arbiter for a computer system having a bus for connection to a plurality of bus devices where each bus device requests control of bus by use of a bus request signal. The bus arbiter contains logic which incorporates a fairness scheme for controlling and prioritizing the bus request signals based on a predetermined priority of each bus device and each bus device's prior access within a fairness cycle. Each device's prior access is tracked by bits in a data register and is determined by whether or not the device actually received or sent information over the bus, and not by a simple granting of access which could result in a retry signal.
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申请公布号 |
US6718422(B1) |
申请公布日期 |
2004.04.06 |
申请号 |
US19990363947 |
申请日期 |
1999.07.29 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
KELLEY RICHARD ALLEN;NEAL DANNY MARVIN;THURBER STEVEN MARK |
分类号 |
G06F13/36;G06F13/362;G06F13/364;G06F13/40;(IPC1-7):G06F13/36 |
主分类号 |
G06F13/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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