发明名称 Clocked half-rail differential logic with single-rail logic
摘要 Clocked half-rail differential logic circuits with single-rail logic of the invention do not include complementary logic elements. According to the invention, the complementary logic function of the prior art is replaced by a single transistor appropriately sized to provide the complementary output OUTBAR. Consequently, clocked half-rail differential logic circuits with single-rail logic of the invention use less power and, therefore, generate less heat, require less space, and are simpler in design so that they are more flexible, more space efficient and more reliable than prior art half-rail differential logic circuits.
申请公布号 US6717438(B2) 申请公布日期 2004.04.06
申请号 US20020231549 申请日期 2002.08.30
申请人 SUN MICROSYSTEMS, INC. 发明人 CHOE SWEE YEW
分类号 H03K19/003;H03K19/173;(IPC1-7):A03K19/096;A03K19/094 主分类号 H03K19/003
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