SEMICONDUCTOR MEMORY DEVICE HAVING TWIN CELLS, WHICH STORES COMPLEMENTARY INFORMATION IN A PAIR MEMORY CELL

摘要

PURPOSE: A semiconductor memory device is provided to reduce the total chip area of the semiconductor memory device by a twin cell method, as improving its performance. CONSTITUTION: According to the cell arrangement of a semiconductor memory device(1), a memory cell(MC) is arranged by pitch of bit lines(BL1,/BL1,BL2,/BL2) at every word line(WLa,WLb). The bit lines are arranged by a folded bit line method, and are connected to sense amplifiers(10,11). Regions(E1,E2) of the semiconductor memory device correspond to complementary memory information of one bit. Complementary memory information of the region(E1) is read by applying a voltage to the word line(WLa) and by detecting potential variation of the bit lines connected to the memory cell where complementary data of H or L level are recorded.