发明名称 Semiconductor device
摘要 A level conversion circuit is provided, at an output, with an initialization circuit for setting the output signal of the level conversion circuit for generating a power cut enable signal controlling a deep power down mode to a predetermined inactive state upon power up. The initialization circuit is constituted by, for example, a capacitive element connected to the output node of the level conversion circuit to pull up the voltage of the output node upon power up, and a latch circuit latching the voltage level of the output node. When power is on, the power cut enable signal is forcibly inactivated by the initialization circuit to generate a periphery power supply voltage. The internal node of the level conversion circuit is initialized according to the output signal of a control circuit receiving the periphery power supply voltage as an operating power supply voltage. In semiconductor memory device having a deep power down mode, an internal voltage is generated reliably and properly upon power up of an internal voltage.
申请公布号 US6717460(B2) 申请公布日期 2004.04.06
申请号 US20020211289 申请日期 2002.08.05
申请人 RENESAS TECH CORP 发明人 YAMAUCHI TADAAKI;OKAMOTO TAKEO;MATSUMOTO JUNKO;TIAN ZENGCHENG
分类号 G11C11/407;G05F3/24;G11C5/14;G11C7/10;G11C7/20;G11C11/4072;G11C11/4074;H03K19/00;(IPC1-7):G05F1/10;G05F3/02 主分类号 G11C11/407
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