发明名称 |
RESETTING CIRCUIT OF DATA PATH USING CLOCK ENABLE SIGNAL, RESETTING METHOD, AND SEMICONDUCTOR MEMORY DEVICE EQUIPPED WITH THE SAME |
摘要 |
PROBLEM TO BE SOLVED: To solve the problem of generating data collision or invalid data at the time of a reading/writing command applied after software resetting. SOLUTION: The resetting circuit is a circuit for initializing the internal clock of a semiconductor memory device, and provided with an external voltage detector for detecting the level of an external voltage to generate a first resetting signal, and a second resetting signal generator for generating a second resetting signal by subjecting a predetermined external signal applied from the outside and the first resetting signal to a logical operation. The second resetting signal is used for resetting a predetermined block concerning the data path of a semiconductor memory device, and the first resetting signal is used for resetting blocks other than the predetermined block concerning the data path. The external signal used for generating the second resetting signal is a clock enable signal. According to the invention, the block concerning the data path is reset during software resetting. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2004103222(A) |
申请公布日期 |
2004.04.02 |
申请号 |
JP20030312356 |
申请日期 |
2003.09.04 |
申请人 |
SAMSUNG ELECTRONICS CO LTD |
发明人 |
RI JUNBAI;JUNG WON-CHANG |
分类号 |
G11C11/407;G11C7/00;G11C7/10;(IPC1-7):G11C11/407 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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