| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which prevents circuit analysis, and to provide its manufacturing method. SOLUTION: After forming an interlayer film 11a on another interlayer film 4b, a shielding film 12 consisting of TiSi<SB>2</SB>is formed on the interlayer film 11a through patterning. When the shielding film 12 is formed on the interlayer film 11a through patterning, another interlayer film 11b is formed across the whole surface on the interlayer film 11a with the shielding film 12 thereon. Thereafter, a contact unit 13 is formed across the interlayer film 11b. When the contact unit 13 is formed, a wiring 14 is formed on the interlayer film 11b through patterning by depositing a conductive material of a metal or the like. When the wiring 14 is formed on the interlayer film 11b, an opening 15 to an Si substrate 1 is formed after penetrating the interlayer film 11b, the shielding film 12, the interlayer film 11a, the interlayer film 4b, the shielding film 7 and the interlayer film 4, so as to avoid a gate silicon 2, a wiring 10 and the wiring 14 which form the circuit. COPYRIGHT: (C)2004,JPO
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