发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To integrate a nonvolatile memory cell array and two kinds of MIS(metal insulator semiconductor) transistor circuits, which are different in the thickness of the gate insulator film in a simple process to exhibit desired characteristics, respectively. SOLUTION: Forming of wells 3, 4 and ion implantation for a high breakdown voltage circuit portion are carried out. After a tunnel oxide 6 of the laminated-layer gate nonvolatile memory cell array and a polysilicon film 7 and ONO film 8 are formed as a floating gate, the tunnel oxide 6, the polysilicon film 8 and the ONO film 8 are left in the memory cell array region selectively; and the surface of a silicon substrate 1 is exposed in the high breakdown voltage circuit portion and low breakdown voltage circuit portion to form a first gate oxide 9. In the low breakdown voltage circuit portion, forming of wells 10, 11 and controlling of channels are carried out with the first gate oxide as a sacrificial oxide, using ion implantation at the same time. Then, the first gate oxide of the low breakdown voltage circuit portion is removed, and a second gate oxide 12 is formed in the low breakdown voltage circuit portion. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004104141(A) 申请公布日期 2004.04.02
申请号 JP20030343212 申请日期 2003.10.01
申请人 TOSHIBA MICROELECTRONICS CORP;TOSHIBA CORP 发明人 MORI SEIICHI;SAITO MASANOBU;ARAI NORIHISA;OSHIMA YOICHI
分类号 H01L21/8234;H01L21/8247;H01L27/088;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824;H01L21/823 主分类号 H01L21/8234
代理机构 代理人
主权项
地址