发明名称 Digital level shifter with reduced power dissipation and false transmission blocking
摘要 A digital level shift circuit includes a level shifting device such as a high voltage MOS device and can also include feedback circuitry. The level shifting device is turned on to make an output transition, and the feedback circuitry obtains a feedback or acknowledge signal indicating that the transition was made. In response, the feedback circuitry turns off the level shifting device, which can reduce power dissipation. A digital level shift circuit that includes two n-channel devices and two p-channel devices can also include sense/prevent circuitry that senses when current greater than a threshold flows through both devices of one channel type and, in response, prevents output transitions from being made, which can avoid false transmissions due to rapid changes in offset voltage. Control circuitry in a digital level shift circuit can include both feedback circuitry and sense-prevent circuitry. In addition, the level shifting devices can be connected into a cross-acknowledge scheme in which none of the devices receives its acknowledge signal from the device to which it provides an acknowledge signal; this makes it possible to avoid a standoff between two devices. The control circuitry can also include, for each device, feedback detection circuitry to distinguish acknowledge signals, making it possible to restart a device that stops transmitting in response to a signal from another device that was not an acknowledge signal.
申请公布号 US2004061522(A1) 申请公布日期 2004.04.01
申请号 US20030662070 申请日期 2003.09.12
申请人 INTERNATIONAL RECTIFIER CORPORATION 发明人 MORINI SERGIO;GRASSO MASSIMO
分类号 H03K5/1252;H03K19/0185;(IPC1-7):H03K19/017 主分类号 H03K5/1252
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