发明名称 BUS CIRCUIT OF REDUCED MAXIMUM POWER CONSUMPTION BY USING DELAY DIFFERENCE OF SIGNAL TRANSFER BETWEEN BUS LINES
摘要 PURPOSE: A bus circuit of the reduced maximum power consumption by using a delay difference of the signal transfer between bus lines is provided to reduce the maximum I/O(Input/Output) power consumption more and more without needing an additional bus line or an additional circuit for encryption/decryption. CONSTITUTION: The bus lines are divided into several groups. Dividing one clock cycle into more small intervals between groups of each bus line, the bus lines of each group have a variance of a bus signal value with a fixed delay. The fixed delay called skew is realized by inserting delay devices(12) into a position between a flipflop(11), which is an output buffer, and a pad(13). The delay devices have a delay value differed from each bus line of the circuit(1) sending a bus signal between two circuits exchanging the signal through an I/O circuit.
申请公布号 KR20040027168(A) 申请公布日期 2004.04.01
申请号 KR20020058938 申请日期 2002.09.27
申请人 KT CORPORATION 发明人 LEE, YEONG MU
分类号 G06F13/42;(IPC1-7):G06F13/42 主分类号 G06F13/42
代理机构 代理人
主权项
地址