FERROELECTRIC TRANSISTOR FOR STORING TWO DATA BITS

摘要

A method of storing and accessing two data bits in a single ferroelectric FET includes selectively polarizing two distinct ferroelectric regions (105, 106) in the same gate dielectric layer separated by a non-ferroelectric dielectric region (107). A first ferroelectric region (106) is sandwiched between the substrate (100) and the gate terminal (108) in the region of the source and is polarized in one of two states to form a first data bit within the FET. A second ferroelectric region (105) is sandwiched between the substrate (100) and the gate terminal (108) in the region of the drain and is polarized in one of two states to form a second data bit within the FET. Detection of the first data bit is accomplished by selectively applying a read bias to the FET terminals, a first current resulting when a first state is stored and a second current resulting when a second state is stored. The polarization of the second data bit is accomplished by reversing the source and drain voltages.