| 摘要 |
One embodiment of the present invention provides a system that improves reliability in a compute processor by re-executing instructions. During operation, the system issues an instruction to an execution unit within the computer processor. The execution unit subsequently executes the instruction to produce a first result. If an idle execution slot becomes available, the system reissues the instruction to the execution unit, which causes the instruction to be executed a second time to produce a second result. The system then compares the first result with the second result. If the first result is not identical to the second result, the system flags an error.
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