发明名称 |
System and method for clock synchronization of multi-channel baud-rate timing recovery systems |
摘要 |
A clock control circuit for use in a multi-channel baud-rate timing recovery loop includes a control circuit responsive to a phase error signal from at least one phase detector for generating at least one clock control signal, wherein said control circuit propagates adjustments required for frequency correction in a synchronous fashion across all of the N-channels.
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申请公布号 |
US2004062333(A1) |
申请公布日期 |
2004.04.01 |
申请号 |
US20020256991 |
申请日期 |
2002.09.26 |
申请人 |
STMICROELECTRONICS, INC. |
发明人 |
BERTSCHMANN ROGER KEVIN;SADEGHI-EMAMCHAIE SAEID |
分类号 |
H03L7/087;H03L7/091;H03L7/093;H04L7/033;H04L25/14;(IPC1-7):H03L7/06;H04L7/00;H03D3/24 |
主分类号 |
H03L7/087 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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