发明名称 |
DATENPROZESSOR MIT PARALLELER DECODIERUNG UND AUSFÜHRUNG VON DATEN- UND ADRESSBEFEHLEN |
摘要 |
The present invention relates to a data processor which comprises a first pipeline for decoding and executing data instructions, a second pipeline for decoding and executing address instructions, a unit for issuing multiple instructions to said pipelines, a first set of registers being coupled with said first pipeline, and a second set of registers being coupled with said second pipeline, wherein first and second pipeline process data in parallel. <IMAGE> |
申请公布号 |
DE69821957(D1) |
申请公布日期 |
2004.04.01 |
申请号 |
DE1998621957 |
申请日期 |
1998.09.04 |
申请人 |
INFINEON TECHNOLOGIES NORTH AMERICA CORP., SAN JOSE |
发明人 |
FLECK, G.;MOLLER, H.;BAROR, GIGY |
分类号 |
G06F9/30;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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