Semiconductor device manufacturing method

摘要

It is an object to provide a technique for reducing an electric resistance between a contact plug and an impurity region to be electrically connected thereto while maintaining an insulating property between a gate electrode and the contact plug. A sidewall insulating film (17) is formed on a side surface of a gate structure (60) provided on a semiconductor substrate (1), and epitaxial layers (19a) and (19b) are formed in self-alignment on n-type impurity regions (13a) and (13b) so that the sidewall insulating film (17) lies between the epitaxial layers (19a) and (19b) and a gate electrode (50). An etching blocking film (20) and an interlayer insulating film (21) are formed over a whole surface in this order. Using the etching blocking film (20) as an etching stopper, the interlayer insulating film (21) is etched and the exposed etching blocking film (20) is subsequently etched. Consequently, contact holes (30a) and (30b) reaching the epitaxial layers (19a) and (19b) are formed.