SRAM COMPATIBLE MEMORY CORRECTING OUTPUT INVALID DATA AS PARITY AND ITS DRIVING METHOD

摘要

PURPOSE: A SRAM compatible memory correcting output invalid data as a parity and its driving method are provided to prevent the decrease of an operation speed due to a refresh operation. CONSTITUTION: The SRAM compatible memory having a number of memory banks(10-0,...,10-7) which includes each a plurality of DRAM cells(11) arranged on a matrix, and the memory banks record its own input data provided at a specific time into a specific DRAM cell respectively. A parity generator(20) generates input parity from the input data, and the input parity has a set parity value together with the input data. A parity bank(12) records the input parity. And a data corrector(14) corrects withdrawal data from the memory bank accessed invalidly, as to the set parity value and a check parity value.