发明名称 Processor system, processor and arithmetic processing method
摘要 <p>The system has two program storage locations, each storing a respective program, and a program counter (5) that outputs execution address of the programs. A selector (8) changes the address of the counter to another address when it is determined that counter coincides with initial address by a comparator (10). A data bus (10) updates the addresses of the programs stored in two data storage locations. The comparator compares whether or not the counter coincides with one of two addresses. An independent claim is also included for an arithmetic processing method.</p>
申请公布号 EP1403768(A2) 申请公布日期 2004.03.31
申请号 EP20030021630 申请日期 2003.09.25
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 WAKASUGI, JUN
分类号 G06F11/00;G06F11/36;(IPC1-7):G06F11/36 主分类号 G06F11/00
代理机构 代理人
主权项
地址