发明名称 Method and system for high-speed multiplication
摘要 <p>A multiplier X is copied into a variable Z. The bits of the multiplier X are read two at a time, starting with the least significant two bits. If the bit pair X (i+1)X iis equal to 11, then 1 is added to Z (i+2). The process continues for successive non-overlapping pairs of bits, until the most significant three bits of X are reached. The last three bits are encoded using table look-up process. Independent claims are also included for the following: (1) system for multiplying two binary numbers; (2) computer program product comprising computer usable medium storing control logic program.</p>
申请公布号 EP1403760(A2) 申请公布日期 2004.03.31
申请号 EP20030021760 申请日期 2003.09.25
申请人 BROADCOM CORPORATION 发明人 WANG, MINSHENG
分类号 G06F7/52;(IPC1-7):G06F7/52 主分类号 G06F7/52
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